Why Reverse-Engineering an EUV Lithography Machine Is Nowhere Near as Simple as It Sounds?

If a state actor or competitor somehow got their hands on a complete ASML EUV scanner tomorrow, how long before they could build their own? The honest answer, based on how these systems actually come together is a lot longer than most people assume and possibly never, if the goal is matching ASML's actual production performance.

Here's why.

1.     The Machine Isn't the Technology but The Integration Is

An EUV scanner isn't one invention. It's thousands of extraordinarily precise subsystems   light source, mirrors, vacuum chambers, wafer stages, metrology, vibration isolation, contamination control, computational correction all operating in concert at nanometer tolerances.

You can take the whole thing apart and catalog every component. What you can't easily extract is how those components were designed, manufactured, measured, and tuned to work together at commercial yield. Knowing a mirror's curvature is one thing. Knowing why that curvature was chosen, what got rejected along the way, and how it was aligned to sub-nanometer precision inside a working system is a different problem entirely.

2.     Tacit Knowledge Is the Real Moat

Patents and blueprints are the easy part   they're often public. What isn't public is the accumulated experience behind them: failed prototypes, supplier learning curves, manufacturing tweaks, and thousands of small engineering decisions made over two decades.

A reverse engineer can measure a mirror's coating and composition. They can't measure why that specific design won out over alternatives, what defects showed up during early production runs, or how yield was incrementally improved. That knowledge lives inside the organization and its supplier network   it was never written down in a form that transfers.

3.     Precision Manufacturing Doesn't Copy-Paste

EUV lithography runs at tolerances where tiny errors are catastrophic. Mirror surface accuracy, stage movement, thermal stability, vibration control, contamination management   all have to hold simultaneously at nanometer scale.

You can copy a design perfectly and still fail to manufacture it reliably. A slightly imperfect polish, a marginal vibration issue, a small alignment drift   any of these can tank throughput or make the machine effectively unusable, even though it "looks" identical to the original on paper.

4.     The Light Source Alone Is a Decade-Long Problem

Worth calling out on its own: generating usable EUV light means hitting microscopic tin droplets with a laser twice   once to shape them, once to vaporize them into plasma   at tens of thousands of times per second, with each droplet positioned precisely enough to hit reliably, hour after hour, in a production environment. Getting this from "works in a lab" to "runs 24/7 in a fab without breaking" took over a decade of dedicated engineering. The physics has been public for years; the engineering reliability has not.

5.     No Company Builds This Alone   And You Can't Copy an Ecosystem

ASML depends on a global supplier network   precision optics makers, vacuum system specialists, mechanical manufacturers   each contributing decades of their own accumulated expertise. The finished machine represents years of iterative collaboration between organizations, not just ASML's internal work.

Copying the machine doesn't recreate the supplier ecosystem, their quality control systems, or their specialized workforce. You'd need to rebuild an entire industrial network, not just a factory.

6.     Software and Process Knowledge Matter as Much as Hardware

EUV systems run on control algorithms, computational lithography, calibration routines and defect-correction software and even a perfectly reproduced machine still needs years of operational learning: how to run it, maintain it, improve yield on it and integrate it into a broader chip fabrication process.

7.     Reverse Engineering Answers "What," Not "Why"

This is the core limitation. Taking a machine apart tells you what it contains. It doesn't tell you why it was built that way, or how to reproduce its performance reliably at industrial scale. That gap between disassembly and replication   is where reverse-engineering efforts typically stall.

 

The Bigger Picture

• What you get from reverse engineering is What you still don't have
• Physical access to the machine needs Decades of tacit knowledge
• Component specifications vs Integration experience
• Design details vs Manufacturing culture
• Individual engineers: The organization behind them
• Patents and documents : The trial-and-error history
• System architecture: Production-scale yield

The bottleneck was never really about access to information. It's about the accumulated, hard-won capability to turn that information into a reliable, industrial-scale system  and that kind of capability doesn't transfer just because you have the hardware in front of you.

DHRUV64: What's Actually Indigenous and What Isn't

1.    India's DHRUV64 launch has been celebrated rightly as a milestone. But the coverage has blurred a distinction worth making clearly: 

 

What's genuinely indigenous

2.    The design and architecture work behind DHRUV64 is real, homegrown engineering. C-DAC, under the Digital India RISC-V (DIR-V) programme and MeitY's Microprocessor Development Programme, built a 1.0 GHz, 64-bit dual-core processor from the ground up. That's a legitimate capability milestone and India now has in-house teams who can architect, verify, and tape out a modern multicore chip. That skill pipeline (following SHAKTI, AJIT, VIKRAM, THEJAS) is the real story, and it deserves credit.

Pic Source: https://www.newindianexpress.com/business/press-releases/2025/Dec/15/india-launches-dhruv64-strengthening-indigenous-microprocessor-ecosystem

 What's borrowed and that's fine, but worth naming

3.    A few things get glossed over in the celebratory framing:

• The instruction set isn't Indian. DHRUV64 is built on RISC-V, an open, internationally governed ISA that anyone can use and is the same base architecture chosen by companies worldwide. Using RISC-V is a smart, pragmatic choice (it avoids costly ARM/x86 licensing), but it's not a uniquely Indian invention. "Fully indigenous processor" should mean indigenous design, not indigenous ISA and it's worth being precise about which one we're claiming.

• It wasn't fabricated in India. DHRUV64 was taped out and manufactured in Taiwan, on a mature 28nm process. This is COTS foundry capacity and the same kind any country without its own leading fab would use. (Notably, its predecessor THEJAS64 was fabricated domestically at the Semiconductor Laboratory, Mohali so India has done in-country fabrication before, just not for this chip.)

• 28nm is not cutting-edge. For context, the AI accelerators and high-end defence/space processors implies DHRUV64 will power typically run on 4–7nm nodes today. A 28nm chip is well suited to embedded systems, industrial automation, and IoT which is exactly how C-DAC has actually described it. It is not, technically, in the performance class needed for "next-gen AI platforms" or advanced missile guidance computation.

The quieter, more honest quote

4.    Buried in the actual interviews (not the press-release coverage) is this, from C-DAC scientist Libin T.T.:

DHRUV64 was conceived as a deliberate intermediate step, not a technological leap and is a bridge from low-frequency microcontrollers toward gigahertz-class application processors.

5.    That's a far more useful and credible framing than "rivals global leaders." It positions DHRUV64 correctly: a real, necessary rung on the ladder and not the top of it yet.

 Why this distinction matters

6.    None of this diminishes the achievement. Every semiconductor power including the US, China, and Taiwan built early capability on borrowed ISAs or foreign foundries before achieving full-stack sovereignty. The honest version of the DHRUV64 story is actually the more encouraging one: India has now proven it can design competitive silicon. The next milestones is indigenous fabrication at scale, and eventually leading-edge nodes are the ones to watch for.

7.    Calling DHRUV64 "fully indigenous" and implying it already powers cutting-edge AI and defence systems sets up a credibility gap the moment anyone checks the specs. Calling it what it is an indigenously designed processor on a mature, foreign-fabricated node, and a deliberate stepping stone  is both more accurate and, frankly, a better story.

Strategic Electronics Sensors & Critical Futuristic Technologies: SES-2026

 

I had the opportunity to speak at SES 2026 Bengaluru on the panel "Strategic Insights into Sensors, AI, Quantum, and Futuristic Technologies."

This presentation shares key insights from the session, exploring how advances in sensors, artificial intelligence, quantum technologies, and emerging innovations are shaping the next generation of intelligent systems. I hope these slides provide useful perspectives for researchers, engineers, technology leaders, and anyone interested in the future of deep tech.