DHRUV64: What's Actually Indigenous and What Isn't

1.    India's DHRUV64 launch has been celebrated rightly as a milestone. But the coverage has blurred a distinction worth making clearly: 

 

What's genuinely indigenous

2.    The design and architecture work behind DHRUV64 is real, homegrown engineering. C-DAC, under the Digital India RISC-V (DIR-V) programme and MeitY's Microprocessor Development Programme, built a 1.0 GHz, 64-bit dual-core processor from the ground up. That's a legitimate capability milestone and India now has in-house teams who can architect, verify, and tape out a modern multicore chip. That skill pipeline (following SHAKTI, AJIT, VIKRAM, THEJAS) is the real story, and it deserves credit.

Pic Source: https://www.newindianexpress.com/business/press-releases/2025/Dec/15/india-launches-dhruv64-strengthening-indigenous-microprocessor-ecosystem

 What's borrowed and that's fine, but worth naming

3.    A few things get glossed over in the celebratory framing:

• The instruction set isn't Indian. DHRUV64 is built on RISC-V, an open, internationally governed ISA that anyone can use and is the same base architecture chosen by companies worldwide. Using RISC-V is a smart, pragmatic choice (it avoids costly ARM/x86 licensing), but it's not a uniquely Indian invention. "Fully indigenous processor" should mean indigenous design, not indigenous ISA and it's worth being precise about which one we're claiming.

• It wasn't fabricated in India. DHRUV64 was taped out and manufactured in Taiwan, on a mature 28nm process. This is COTS foundry capacity and the same kind any country without its own leading fab would use. (Notably, its predecessor THEJAS64 was fabricated domestically at the Semiconductor Laboratory, Mohali so India has done in-country fabrication before, just not for this chip.)

• 28nm is not cutting-edge. For context, the AI accelerators and high-end defence/space processors implies DHRUV64 will power typically run on 4–7nm nodes today. A 28nm chip is well suited to embedded systems, industrial automation, and IoT which is exactly how C-DAC has actually described it. It is not, technically, in the performance class needed for "next-gen AI platforms" or advanced missile guidance computation.

The quieter, more honest quote

4.    Buried in the actual interviews (not the press-release coverage) is this, from C-DAC scientist Libin T.T.:

DHRUV64 was conceived as a deliberate intermediate step, not a technological leap and is a bridge from low-frequency microcontrollers toward gigahertz-class application processors.

5.    That's a far more useful and credible framing than "rivals global leaders." It positions DHRUV64 correctly: a real, necessary rung on the ladder and not the top of it yet.

 Why this distinction matters

6.    None of this diminishes the achievement. Every semiconductor power including the US, China, and Taiwan built early capability on borrowed ISAs or foreign foundries before achieving full-stack sovereignty. The honest version of the DHRUV64 story is actually the more encouraging one: India has now proven it can design competitive silicon. The next milestones is indigenous fabrication at scale, and eventually leading-edge nodes are the ones to watch for.

7.    Calling DHRUV64 "fully indigenous" and implying it already powers cutting-edge AI and defence systems sets up a credibility gap the moment anyone checks the specs. Calling it what it is an indigenously designed processor on a mature, foreign-fabricated node, and a deliberate stepping stone  is both more accurate and, frankly, a better story.